1. Field of the Invention
This invention relates to a semiconductor memory device, and in particular, to a ternary content addressable memory (TCAM).
2. Description of the Background Art
In recent years, demand for content addressable memories (CAM's) having an address searching function has been increasing as a result of spreading internet use. In particular, demand for ternary content addressable memory (TCAM) where three values 0, 1 and X can be held in one memory cell has been increasing. In many cases, such TCAM's are used in the field of SoC's (systems on chips), particularly for system LSI's for routers, network switches and the like.
FIG. 26 is a circuit diagram showing the configuration of a memory cell which is used in a conventional TCAM. This configuration is disclosed in Japanese Patent Laying-Open No. 2003-141879.
With reference to FIG. 26, in a CAM cell 568, data bit line pair BIT and BITN is shared by and connected to two data cells 546 and 548, and a word line WL1 is connected to data cell 546, and a word line WL2 is connected to data cell 548. A comparing circuit 550 compares the data held in data cells 546 and 548 with comparison data that is supplied via comparison data lines CMB and CMBN, and outputs the results of comparison to a match line ML.
In recent years, increase in the memory capacitance in TCAM's has been desired, and increased integration of TCAM's has been demanded. However, Japanese Patent Laying-Open No. 2003-141879 and other prior art documents do not show any concrete layout for TCAM cells.